Electrical signals are communicated between various electronic components, such as integrated circuits, resistors, capacitors, etc., using metal traces on a circuit board, such as a printed circuit board (PCB). Circuit boards are configured to connect the electronic components in a desired pattern to form an electrical circuit, collectively referred to as printed circuit assemblies (PCAs). A circuit board typically includes one or more conductive layers separated by layers of insulating material, referred to as substrates or dielectrics. The conductive layers are etched into conductive patterns, or traces, for connecting the electronic components, which are soldered to the circuit board. The conductive layers may be selectively connected together by vias. One or more of the conductive layers may be of solid metal for providing a ground plane and/or a power plane. An outer layer of the circuit board typically includes pads and lands to which the electronic components are soldered. Most circuit boards also include a solder mask layer, which is typically a plastic polymer. The solder mask covers areas of the circuit board that should not be soldered and includes cutouts or openings in regions where the electronic components are to be soldered to the circuit board. The solder mask, which is typically a plastic polymer, resists wetting by solder, prevents solder from bridging between conductors and creating short circuits, and may also provide protection against environmental contaminants.
FIG. 1 illustrates a cut-out side view of an exemplary circuit board. The circuit board includes multiple layers 28-60, including dielectric layers 30, 34, 38, 42, 46, 50, 34, and 58, ground planes 32, 40, 44, 48, and 56, and power planes 36 and 52. The circuit board also includes a bottom layer 60 and a top layer 28. A pair of signal lines 2 and 4, and test point pads 6 and 8 are configured on the top layer 28. It is understood that electronic components and additional signal lines can be configured on the top layer 28. Although not shown in FIG. 1, it is understood that a solder mask can be added as part of the top layer 28. It is understood that more or less than the number of dielectric layers, ground plane layers, and power plane layers can be included in the circuit board. It is also understood that additional conductive layers can be added and selectively etched to provide conductive patterns within the circuit board and between the various electronic components and signal lines on the top layer 28.
Printed circuit assemblies (PCA's) are typically tested after manufacture to verify the continuity of traces between pads and vias on the circuit board and to verify that electronic components loaded on the circuit board perform within specifications. Circuit board testing is performed by applying electrical signals to certain contact points, referred to as test point pads, on the circuit board. A circuit board test device, such as an automated in-circuit test (ICT), is capable of probing conductive pads, vias, and traces on the circuit board under test. The circuit board test device typically includes a test probe unit having multiple test probes, each test probe capable of contacting a certain test point pad of the circuit board and applying an electrical signal to the test point pad. This necessitates having test points within the layout of circuit boards that are accessible by the test probes. Test point pads are usually circular targets with a 25 to 35 millimeter diameter that are connected to traces on the circuit board. In some cases, these test points are deliberately added test point pads, and in other cases the test points are pads surrounding vias already provided in the circuit board.
Layout rules typically require test point pads to be at least a minimum distance apart and may require the diameter of the test point pads to greatly exceed the width of the traces. For example, due to a width of the test probes, when two separate probes simultaneously engage two adjacent test point pads, a minimum distance between the adjacent test point pads is required to provide sufficient physical space for access by the two separate probes. This minimum distance is often measured from a center of each of the two adjacent test point pads, and is referred to as pitch. In many applications, the minimum pitch is about 65 millimeters.
In many applications, high-speed data is transmitted through a pair of differential transmission signal lines, or traces. The pair of signal lines are configured close together, often too close to enable complimentary test point pads to be connected to the signal lines because the minimum pitch between the two test point pads can not be established.
FIG. 2 illustrates a top-down view of a pair of differential transmission signal lines and corresponding test point pads according to a conventional configuration. The pair of differential signal lines includes a first signal line 2 and a second signal line 4. A first test point pad 6 is used to test the first signal line 2, and a second test point pad 8 is used to test the second signal line 4. Due to the physical parameters of conventional test probes, the first test point pad 6 and the second test point pad 8 must be spaced a minimum distance apart from each other in order to permit a first test probe to contact the first test point pad 6 while a second test probe contacts the second test point pad 8. This minimum distance is defined as pitch, and is shown as line 14 having a distance measured from a center of the first test point pad 6 to a center of the second test point pad 8. As shown in FIG. 2, line 14 is perpendicular to the signal lines 2 and 4, and as such the two test point pads 6 and 8 are said to be aligned. In this configuration, the pitch 14 is great enough to prevent the test point pads 6 and 8 from being connected directly to the signal lines 2 and 4, respectively. Moving the test point pads 6 and 8 to connect directly to the signal lines 2 and 4 would prohibit two test probes from simultaneously accessing the test point pads 6 and 8. As such, the test point pad 6 is offset from the signal line 2 and the test point pad 8 is offset from the signal line 4, thereby providing the minimum pitch 14. As the test point pads 6 and 8 are no longer connected directly to the signal lines 2 and 4, the test point pads 6 and 8 must be indirectly connected. An extension, or bridge, 10 is coupled to the test point pad 6. A via (not shown) couples the bridge 10 to a lower layer trace (not shown) that is coupled to the signal line 2. Similarly, an extension, or bridge, 12 is coupled to the test point pad 8. A via (not shown) couples the bridge 10 to a lower layer trace (not shown) that is coupled to the signal line 4.
In operation, an electrical signal transmitted along signal line 2 is divided into two signals at the test point pad 6. A first of the signals is transmitted to the test point pad 6 and the second signal continues along the signal line 2. When a test probe is contacted to the test point pad 6, the first electrical signal is transmitted to the test probe. However, when a test probe is not contacted to the test point pad 6, this signal path is considered “open” and the first electrical signal is reflected back to the signal line 2. As such, the structure including the test point pad 6 and the signal line 2 is referred to as an “open stub”. The open stub effects the impedance of the signal line 2 at the test point pad 6, and also effects the signal quality of the electrical signal transmitted along the signal line 2. The effect of the open stub is measured by the physical size of the test point pad 2. The larger the open stub, the greater the change of impedance of the signal line 2 at the test point pad 6, and the greater the decrease in signal quality of the electrical signal transmitted along the signal line 2. A similar open stub is formed by the test point pad 8.
FIG. 3A illustrates a top-down view of a pair of differential transmission signal lines and corresponding test point pads according to an alternative conventional configuration. The configuration of FIG. 3A is similar to the configuration of FIG. 2 where the test point pads 6 and 8 are positioned with the minimum pitch 14, except that a connecting line 16 connects the test point pad 6 to the signal line 2, and a connecting line 18 connects the test point pad 8 to the signal line 4. The connecting lines 16 and 18 are on the same layer as the signal lines 2 and 4 and the test point pads 6 and 8. Using connecting lines on the same layer as the signal lines and the test point pads eliminates the need to couple the test point pads to the signal lines using an inner layer conductive pattern, such as in FIG. 1. However, the open stub structure is increased to include both the test point pad and the connecting line. As such the effect of the open stub is increased, which further changes the impedance of the signal line at the test point pad and further decreases the signal quality of the electrical signal transmitted along the signal line.
FIG. 3B illustrates a top-down view of a pair of differential transmission signal lines and corresponding test point pads according to another alternative conventional configuration. The configuration of FIG. 3B is similar to the configuration of FIG. 2 where the test point pads 6 and 8 are positioned with the minimum pitch 14, except that the signals lines 22 and 24 are altered to connect directly with the test point pads 6 and 8, respectively. Redirecting the signal lines 22 and 24 to enable direct connection with the test point pads 6 and 8, respectively, eliminates the need to couple the test point pads to the signal lines using an inner layer conductive pattern, such as in FIG. 1.
It is desired to control the transmission impedance value across the entire run of each signal line. There are a number of critical parameters that effect the impedance of the signal path. These parameters include the signal line width, the signal line separation with an adjacent signal line, the signal line thickness, and the dielectric constants of the solder mask and board materials. These parameters influence the inductance, capacitance, and resistance (skin effect and DC) of the signal lines which combine to determine the transmission impedance. The addition of a test point pad to a signal line negatively impacts the transmission impedance. A capacitance is formed between the test point pad and the ground planes and power planes positioned below the test point pad. Conceptually, the test point pad forms one of the conductors of a capacitor and the ground planes and power planes form the other conductor in the capacitor. This capacitance negatively impacts the signal quality of the electrical signal transmitted along the signal line connected to the test point pad.